? semiconductor components industries, llc, 2007 january, 2007 ? rev. 10 1 publication order number: mc74HCT245A/d mc74HCT245A octal 3?state noninverting bus transceiver with lsttl compatible inputs high?performance silicon?gate cmos the mc74HCT245A is identical in pinout to the ls245. this device may be used as a level converter for interfacing ttl or nmos outputs to high speed cmos inputs. the mc74HCT245A is a 3?state noninverting transceiver that is used for 2?way asynchronous communication between data buses. the device has an active?low output enable pin, which is used to place the i/o ports into high?impedance states. the direction control determines whether data flows from a to b or from b to a. features ? output drive capability: 15 lsttl loads ? ttl/nmos compatible input levels ? outputs directly interface to cmos, nmos and ttl ? operating voltage range: 4.5 v to 5.5 v ? low input current: 1.0 a ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 304 fets or 76 equivalent gates ? pb?free packages are available figure 1. logic diagram a data port a8 a7 a6 a5 a3 a4 a2 a1 9 8 7 6 5 4 3 2 direction output enable 1 19 pin 20 = v cc pin 10 = gnd 18 17 16 15 14 13 12 11 b1 b2 b3 b4 b5 b6 b7 b8 b data port design criteria value units internal gate count* 76 ea internal gate propagation delay 1.0 ns internal gate power dissipation 5.0 w speed power product 0.005 pj *equivalent to a two?input nand gate. function table control inputs operation output enable direction l l data transmitted from bus b to bus a l h data transmitted from bus a to bus b h x buses isolated (high?impedance state) x = don?t care pin assignment a5 a3 a2 a1 direction gnd a8 a7 a6 a4 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 b3 b2 b1 output enable v cc b8 b7 b6 b5 b4 http://onsemi.com see detailed ordering, shipping information, and marking information in the package dimensions section on page 6 of this data sheet. ordering information soic?20w dw suffix case 751d tssop?20 dt suffix case 948e soeiaj?20 f suffix case 967 1 1 1 pdip?20 n suffix case 738 1
mc74HCT245A http://onsemi.com 2 ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? v cc ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? 20 ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? 35 ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? 75 ?? ?? ???? ? ?? ? ???? p d ?????????????? ? ???????????? ? ?????????????? power dissipation in still air, pdip? soic package? tssop package? ?????? ? ???? ? ?????? 750 500 450 ?? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? c ???? ? ?? ? ???? t l ?????????????? ? ???????????? ? ?????????????? lead temperature, 1 mm from case for 10 secs (pdip, soic, ssop or tssop package) ?????? ? ???? ? ?????? 260 ?? ?? ?? c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. ?derating ? plastic dip: ? 10 mw/ c from 65 to 125 c soic package: ? 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c for high frequency or heavy load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). recommended operating conditions ???? ???? ?????????????? ?????????????? ??? ??? ???? ???? ?? ?? ???? ???? v cc ?????????????? ?????????????? ??? ??? ???? ???? ?? ?? ???? ???? ?????????????? ?????????????? ??? ??? ???? ???? ?? ?? ???? ???? ?????????????? ?????????????? ??? ??? ???? ???? ?? ?? c ???? ???? ?????????????? ?????????????? ??? ??? ???? ???? ?? ?? (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74HCT245A http://onsemi.com 3 dc electrical characteristics (voltages referenced to gnd) ???? ? ?? ? ???? symbo l ?????????? ? ???????? ? ?????????? parameter ????????? ? ??????? ? ????????? test conditions ??? ? ? ? ??? v cc v ????????? ????????? ?? ?? ?? ???? ???? c ???? ???? 85 c ??? ??? 125 c ???? ? ?? ? ???? v ih ?????????? ? ???????? ? ?????????? minimum high?level input voltage ????????? ? ??????? ? ????????? v out = 0.1 v or v cc ? 0.1 v |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ???? ? ?? ? ???? 2.0 2.0 ???? ? ?? ? ???? 2.0 2.0 ??? ? ?? ??? 2.0 2.0 ?? ?? ?? ???? ? ?? ? ???? v il ?????????? ? ???????? ? ?????????? maximum low?level input voltage ????????? ? ??????? ? ????????? v out = 0.1 v or v cc ? 0.1 v |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ???? ? ?? ? ???? 0.8 0.8 ???? ? ?? ? ???? 0.8 0.8 ??? ? ?? ??? 0.8 0.8 ?? ?? ?? ???? ? ?? ? ? ?? ? ???? v oh ?????????? ? ???????? ? ? ???????? ? ?????????? minimum high?level output voltage ????????? ????????? 20 a ??? ??? ???? ???? ???? ???? ??? ??? ?? ?? ?? ?? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 6.0 ma ??? ? ? ? ??? 4.5 ???? ? ?? ? ???? 3.98 ???? ? ?? ? ???? 3.84 ??? ? ?? ??? 3.7 ???? ? ?? ? ? ?? ? ???? v ol ?????????? ? ???????? ? ? ???????? ? ?????????? maximum low?level output voltage ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ???? ? ?? ? ???? 0.1 0.1 ???? ? ?? ? ???? 0.1 0.1 ??? ? ?? ??? 0.1 0.1 ?? ?? ?? ?? ????????? ????????? 6.0 ma ??? ??? ???? ???? ???? ???? ??? ??? ???? ???? ?????????? ?????????? ????????? ????????? ??? ??? ???? ???? 0.1 ???? ???? 1.0 ??? ??? 1.0 ?? ?? a ???? ? ?? ? ???? i cc ?????????? ? ???????? ? ?????????? maximum quiescent supply current (per package) ????????? ? ??????? ? ????????? v in = v cc or gnd i out = 0 a ??? ? ? ? ??? 5.5 ???? ? ?? ? ???? 4.0 ???? ? ?? ? ???? 40 ??? ? ?? ??? 160 ?? ?? ?? a ???? ? ?? ? ???? i oz ?????????? ? ???????? ? ?????????? maximum three?state leakage current ????????? ? ??????? ? ????????? output in high?impedance state v in = v il or v ih v out = v cc or gnd, i/o pins ??? ? ? ? ??? 5.5 ???? ? ?? ? ???? 0.5 ???? ? ?? ? ???? 5.0 ??? ? ?? ??? 10 ?? ?? ?? a ???? ? ?? ? ???? i cc ?????????? ? ???????? ? ?????????? additional quiescent supply current ????????? ? ??????? ? ????????? v in = 2.4 v, any one input v in = v cc or gnd, other inputs l out = 0 a ??? ? ? ? ??? 5.5 ????? ????? ?55 c ????? ????? c to 125 c ?? ?? ?? ma ????? ????? ????? ????? ac electrical characteristics (v cc = 5.0 v 10%, c l = 50 pf, input t r = t f = 6.0 ns) ???? ? ?? ? ? ?? ? ???? symbo l ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? parameter ????????? ????????? ?? ?? ?? ?? ???? ? ?? ? ???? ? 55 to 25 c ???? ? ?? ? ???? 85 c ??? ? ?? ??? 125 c ???? ???? t plh , t phl ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? ???? ? ?? ? ???? t plz , t phz ???????????????????? ? ?????????????????? ? ???????????????????? maximum propagation delay, direction or output enable to a or b (figures 3 and 5) ???? ? ?? ? ???? 30 ???? ? ?? ? ???? 36 ??? ? ?? ??? 42 ?? ?? ?? ???? ? ?? ? ???? t pzl , t pzh ???????????????????? ? ?????????????????? ? ???????????????????? maximum propagation delay, output enable to a or 8 (figures 3 and 5) ???? ? ?? ? ???? 30 ???? ? ?? ? ???? 36 ??? ? ?? ??? 42 ?? ?? ?? ???? ???? ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? ???? ???? ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? ???? ???? ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? typical @ 25 c, v cc = 5.0 v pf 97 * used to determine the no?load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d).
mc74HCT245A http://onsemi.com 4 switching waveforms 3.0 v gnd t f t r input a or b output b or a 0.3 v 1.3 v 2.7 v 10% 1.3 v 90% t tlh t plh t phl t thl figure 2. output enable a or b a or b 1.3 v 1.3 v 1.3 v 90% 10% t pzl t plz t pzh t phz 3.0 v gnd high impedance v ol v oh high impedance 3.0 v gnd 1.3 v 1.3 v figure 3. *includes all probe and jig capacitance c l * test point device under test output figure 4. *includes all probe and jig capacitance c l * test point device under test output figure 5. test circuit connect to v cc when testing t plz and t pzl . connect to gnd when testing t phz and t pzh . 1 k direction
mc74HCT245A http://onsemi.com 5 figure 6. expanded logic diagram a data port b data port output enable direction a1 a2 a3 a4 a5 a6 a7 a8 2 3 4 5 6 7 8 9 19 1 b1 b2 b3 b4 b5 b6 b7 b8 18 17 16 15 14 13 12 11
mc74HCT245A http://onsemi.com 6 ordering information device package shipping ? mc74HCT245An pdip?20 18 units / rail mc74HCT245Ang pdip?20 (pb?free) mc74HCT245Adw soic?20 38 units / rail mc74HCT245Adwg soic?20 (pb?free) mc74HCT245Adwr2 soic?20 1000 / tape & reel mc74HCT245Adwr2g soic?20 (pb?free) mc74HCT245Adt tssop?20* 75 units / rail mc74HCT245Adtg tssop?20* mc74HCT245Adtr2 tssop?20* 2500 / tape & reel mc74HCT245Adtr2g tssop?20* mc74HCT245Afelg soeiaj?20 (pb?free) 2000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *these packages are inherently pb?free. marking diagrams pdip?20 soic?20w tssop?20 soeiaj?20 20 1 74HCT245A awlywwg a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb?free package (note: microdot may be in either location) 1 20 hct 245a alyw 20 1 hct245a awlyywwg 1 20 mc74HCT245An awlyywwg
mc74HCT245A http://onsemi.com 7 package dimensions pdip?20 n suffix plastic dip package case 738?03 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 ?a? seating plane k n f g d 20 pl ?t? m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc soic?20w dw suffix case 751d?05 issue g 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
mc74HCT245A http://onsemi.com 8 package dimensions tssop?20 dt suffix case 948e?02 issue c 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. 110 11 20 pin 1 ident a b ?t? 0.100 (0.004) c d g h section n?n k k1 jj1 n n m f ?w? seating plane ?v? ?u? s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 ??? ??? s u 0.15 (0.006) t
mc74HCT245A http://onsemi.com 9 package dimensions soeiaj?20 m suffix case 967?01 issue a dim min max min max inches ??? 2.05 ??? 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.15 0.25 0.006 0.010 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 ??? 0.81 ??? 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 mc74HCT245A/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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